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Software-update: Memtest86 10.7 build 1000

PassMark Software heeft versie 10.7 van Memtest86 uitgebracht. Met dit programma kan het interne geheugen aan een rigoureuze test worden onderworpen om zo eventuele problemen aan het licht te brengen. Memtest86 is in 1994 door Chris Bradly ontwikkeld en begin 2000 is de wellicht nog bekendere Memtest86+ als een fork ontstaan, wat nogal eens tot verwarring leidt. Sinds 2013 is het eigendom van PassMark Software en is het beschikbaar in een gratis en twee betaalde uitvoeringen. Hieronder is de changelog sinds versie 10.0 te vinden:

Fixes/Enhancements
  • Preliminary support for obtaining memory settings for Intel Core chipsets:2nd gen (Sandy Bridge)3rd gen (Ivy Bridge)4th gen (Haswell)5th gen (Broadwell)6th gen (Skylake)7th gen (Kaby lake)8th gen (Coffee Lake)9th gen (Coffee Lake Refresh)10th gen (Comet Lake/Ice Lake)11th gen (Rocket Lake/Tiger Lake)12th gen (Alder Lake)13th gen (Raptor Lake) Core chipsets
  • 2nd gen (Sandy Bridge)
  • 3rd gen (Ivy Bridge)
  • 4th gen (Haswell)
  • 5th gen (Broadwell)
  • 6th gen (Skylake)
  • 7th gen (Kaby lake)
  • 8th gen (Coffee Lake)
  • 9th gen (Coffee Lake Refresh)
  • 10th gen (Comet Lake/Ice Lake)
  • 11th gen (Rocket Lake/Tiger Lake)
  • 12th gen (Alder Lake)
  • 13th gen (Raptor Lake) Core chipsets
  • Preliminary support for obtaining memory settings for Intel Core Ultra chipsets:1st gen (Meteor Lake)2nd gen (Arrow Lake)Lunar Lake
  • 1st gen (Meteor Lake)
  • 2nd gen (Arrow Lake)
  • Lunar Lake
  • Preliminary support for obtaining memory settings for Intel Xeon scalable chipsets:1st gen (Skylake-SP)2nd gen (Cascade Lake-SP)3rd gen (Ice Lake-SP)4th gen (Sapphire Rapids-SP)5th gen (Emerald Rapids-SP)
  • 1st gen (Skylake-SP)
  • 2nd gen (Cascade Lake-SP)
  • 3rd gen (Ice Lake-SP)
  • 4th gen (Sapphire Rapids-SP)
  • 5th gen (Emerald Rapids-SP)
  • Preliminary support for obtaining memory settings for Intel Atom X Series (Elkhart Lake) chipsets
  • Preliminary ECC support for the following Intel chipsets:10th gen core (Ice Lake)1st gen core ultra (Meteor Lake)5th gen Xeon scalable (Emerald Rapid)Atom X Series (Elkhart Lake)
  • 10th gen core (Ice Lake)
  • 1st gen core ultra (Meteor Lake)
  • 5th gen Xeon scalable (Emerald Rapid)
  • Atom X Series (Elkhart Lake)
  • Preliminary support for module decoding for Intel 10th gen core (Ice Lake) chipsets
  • Added support for reporting various ECC error types (eg. IBECC/Scrub)
  • Fixed rounding of DDR5 latency timings
  • Fixed offsetted temperatures for AMD 19h family chipsets
  • Suppress CPU errors due to UEFI firmware issues once already displayed
  • Display "SPD FAIL" block error message when SPDMATCH check fails after test completion
  • Updated localization strings (courtesy of Nagisa)
  • Updated ImageUSB to v1.5.1006
  • Updated blacklist
    • New Features
  • Added support for CFGDEFAULT tag for multi-config files to specify the default configuration
  • Added support for CFGTIMEOUT tag for multi-config files to specify the timeout in seconds
    • Fixes/Enhancements
  • Fixed possible divide by zero error when displaying file system info of attached disks
  • Fixed system address to UMC decoding for AMD Ryzen chipsets
  • Fixed incorrect transfer speed obtained for Alder Lake/Raptor Lake chipsets
    • New Features
  • Extend CHIPMAP configuration parameter to support arbitrary strings up to 4 characters. For backwards compatibility, chip names that are non-negative numbers shall be prepended with "U".
    • Fixes/Enhancements
  • Fixed CPU clock "MHz" cutoff in test screen
  • Fixed report summary screen displaying invalid elapsed time and CPU temperatures
  • Fixed text cutoff due to long strings for certain languages
  • Fixed DIMM temperature text cutoff in test screen for certain languages
    • New Features
  • Added 'SPDREPORTBYELO' and 'SPDREPORTBYTEHI' configuration parameter for specifying the SPD byte range to display in the HTML report
  • Implemented workaround for reading DDR5 SPD when SPD write disable (SPDWR) is set for Intel chipsets
  • Added DIMM/IC decoding support for AMD Phoenix (19h 74h) chipsets
    • Fixes/Enhancements
  • Added support for chipsets with up to 12 memory controllers
  • Fixed hang due to reading non-existent MSR registers for AMD 19h 60-6fh chipsets
  • Fixed channel decoding for AMD Ryzen Zen 2/4 chipsets
  • Fixed incorrect memory clock reported for Intel Alder Lake/Rocket Lake chipsets
  • Fixed incorrect memory clock reported for AMD 19h 60-6fh chipsets
  • Fixed incorrect CPU temperature reported for EPYC 7003 series chipsets due to temperature offsets
  • Fixed DIMM temperature read failure after reading SPD for certain DDR5 modules
  • Added reporting of additional DDR5 SPD attributes
  • Fixed hang due memory allocation issues for Intel Skylake/Kaby Lake chipsets
  • Added ECC support for additional Intel Skylake-SP chipset variants
  • Added workaround for hang when obtaining list of benchmark results
  • Perform cache invalidation before start of the RAM benchmark test to fix result inconsistencies
  • Fixed text being unaligned when containing full-width characters
  • Updated localization strings
  • Updated blacklist
    • New Features
  • Added support for displaying and reporting configured RAM settings for supported chipsets. This includes clock speed, timings, channel mode and voltages.
  • Added support for multiple configurations in a single configuration file. If more than 1 configurations are found, the user is prompted to select a configuration
  • Added support for displaying and reporting DDR5 XMP 3.0 SPD profiles
    • Fixes/Enhancements
  • Display configured RAM settings in test screen. Previously, static memory parameters from SPD/SMBIOS were displayed which were not necessarily the actual configured parameters.
  • Include list of all supported SPD profiles (eg. JEDEC, XMP) in reports
  • Changed units from MHz to MT/s when referring to DRAM transfer rate (typically double the clock speed for DDR RAM)
  • Reduced the execution time of hammer test by increase minimum segment size per thread from 128MB to 512MB
  • Reduced the execution time of hammer test by reducing the maximum number of memory segments to hammer from 64 to 32
  • Fixed crash when running the Block Test RAM benchmark
  • Added ECC support for Intel Raptor Lake chipsets
  • Added DIMM temperature support for Intel Broxton chipsets
  • Extended DIMM decoding support for additional Alder Lake and Raptor Lake chipset variants
  • Fixed disabling of hyperthreads for CPUs with hybrid cores
  • Fixed display of negative CPU temperatures
  • Fixed display of negative RAM temperatures
  • Fixed inconsistent slot name in DIMM results screen
  • Fixed text being truncated in DIMM results screen
  • Fixed DIMM error count reporting for 2-slot motherboards
  • Fixed TCP connection to management console being refused for certain Apache configurations
  • Fixed sending corrupted TCP status XML data to management console
  • Fixed error in saving report files due to invalid characters in the file name
  • Updated blacklist
    • New Features
  • Added preliminary support for Ryzen Zen 4 DDR5 chip decoding
  • Revised criteria for determining the final result of a memory testPASS – All configured tests were completed without any errors detectedFAIL – All configured tests were completed with at least one error was detected or MAXERRCOUNT is exceeded at any point of the testINCOMPLETE PASS – At least one of the configured tests was not completed but no errors were detectedINCOMPLETE FAIL –At least one of the configured tests was not completed and at least one error was detected
  • PASS – All configured tests were completed without any errors detected
  • FAIL – All configured tests were completed with at least one error was detected or MAXERRCOUNT is exceeded at any point of the test
  • INCOMPLETE PASS – At least one of the configured tests was not completed but no errors were detected
  • INCOMPLETE FAIL –At least one of the configured tests was not completed and at least one error was detected
  • Revised criteria for determining the test result of individual modulesPASS – All configured tests were completed and no errors were detected on the module without any undecoded errorsFAIL – All configured tests were completed with at least one error detected on the moduleINCOMPLETE PASS – At least one of the configured tests was not completed but no errors were detected on the module without any undecoded errorsINCOMPLETE FAIL –At least one of the configured tests was not completed and at least one error was detected on the moduleUNKNOWN – No errors were detected on the module but there was at least one undecoded error
  • PASS – All configured tests were completed and no errors were detected on the module without any undecoded errors
  • FAIL – All configured tests were completed with at least one error detected on the module
  • INCOMPLETE PASS – At least one of the configured tests was not completed but no errors were detected on the module without any undecoded errors
  • INCOMPLETE FAIL –At least one of the configured tests was not completed and at least one error was detected on the module
  • UNKNOWN – No errors were detected on the module but there was at least one undecoded error
    • Fixes/Enhancements
  • Added preliminary implementation of ECC injection for Ryzen Zen 4 chipsets
  • Fixed module decoding for DDR4 x16 modules
  • Display ECC error count in message after completing a test pass
  • Fixed incorrect calculation of DDR5 SPD memory bandwidth
  • Added additional columns to module result table in HTML report
  • Removed "Go back to menu" option from the test menu
  • Included '# Tests Completed' in HTML report
    • New Features
  • Added preliminary support for Ryzen Zen 4 DDR5 module decoding
  • Added support for TCP/IP connection to management console
  • Added 'INCOMPLETE' result in cases where not all tests complete but no errors are detected
  • Added temperatures for all detected DIMMs in HTML/XML report
  • Added ECC support for IBECC polling for Tiger Lake Chipsets
  • Added additional options for 'SKIPDECODE' config parameter to skip based on DDR type
    • Fixes/Enhancements
  • Added ECC support for Ryzen zen 4 (60h-6fh)
  • Fixed Intel Raptor Lake model numbers
  • Fixed ECC support for Intel Tiger Lake H and UP3
  • Fixed decode UI layout for DDR4 SO-DIMM 1Rx8
  • Added ECC channel/slot remap workaround for H12SSL-NT
  • Added serial number of failing DIMMs in HTML/XML reports
  • Added DIMM S/N in per DIMM error table in HTML report
  • Include error count for all DIMMs on test failure in HTML/XML report
  • Fixed rank/chip width detection on Intel Tiger Lake chipsets
  • Fixed Chip select hash decoding on Ryzen Zen 2/Zen 4 chipsets
  • Changed 'EXACTSPDS' configuration parameter to accept an array of values
  • Increased main thread wait time if memory error was detected to prevent timeouts
  • Added workaround for UEFI firmware being unable to return correct rendered text dimensions
  • Fixed freeze on some UEFI firmware when attempting to enable main thread during Multi-Processor init
  • Fixed potential boot issues on some MSI Ryzen motherboards
  • Fixed bug in parsing DDR5 SDRAM Density Per Die resulting in incorrect module size
  • Fix premature main thread timeout in parallel mode due to reporting memory errors
  • Fix slot mapping of memory errors for Ryzen AM4 boards
  • Fix bug in determining unknown slot errors when there are consecutive errors for the same address
  • Fix '# Logical Processors' not appearing properly in XML file
  • reduce verbosity of SPD/TSOD SMBus logs
    • New Features
  • Added DIMM and IC decoding for Intel 13th generation Raptor Lake processors
  • Added ECC support for Intel Skylake E on HPE platforms
  • Added support for retrieving DDR5 SPD on Intel Raptor Lake S
  • Added support for retrieving DDR5 SPD on AMD Ryzen 7000 CPUs
  • Added 'SKIPDECODE' configuration parameter to skip the decode results screen after completion of tests (Pro/Site Editions)
    • Fixes/Enhancements
  • Modify CHIPMAP config param to include form factor attribute ( e.g. SODIMM, DIMM, etc.)
  • Fix bug applying valid CHIPMAP configurations (when # of CHIPMAP entries is < 7)
  • Include DIMM rank/chip width in HTML report
  • Include DIMM/chip errors in XML file to PXE server
  • Fix UI display of SODIMM chip errors
  • Fix UI display of DIMM x16 chip errors
  • Fix lockup on Mac devices caused by buffer overrun and type overflow in parsing of localization strings
  • Fix handling of measuring text width for empty strings causing lockup on Sandy Bridge CPUs
  • Fix of SPD channel/slot assignment for Intel E5 v3 chipset
  • Fix DIMM result screen to handle boards with unused MC slots ( e.g. Q670EI IM A)
  • Fix SODIMM chip ordering in the result screen
  • Include unknown DIMM/chip errors in HTML/PXE reports
    • New Features
  • Modified CHIPMAP config file parameter to support multiple DIMM configurations (eg. DDR4|DDR5, x8|x16, 1R|2R, 8GB|16GB)
  • Added DIMM and IC decoding for Intel 8th, 9th, 10th and 11th generation processors (Pro/Site editions).
  • Added initial support for Raptor Lake, Tremont and Sapphire Rapids chipsets. This includes accurate retrieval and display of processor speed, core status, temperature information and of core group multipliers
    • Fixes/Enhancements
  • Reduced overall image size to allow use of USB flash drives under 1GB
  • Fixed ECC channel/slot error details not displaying correctly
  • Added “Un-decoded” errors to results screen
  • Updated CPU cache speed values to 64bit to prevent overflow errors on faster systems
  • Fixed mapping of SMBIOS slot to SPD when there are duplicate serial numbers
  • Fixed hyperthread detection when max number of CPU threads are limited (eg. 16 in Free edition)
  • Fixed issue allowing multiprocessor cores to exceed max system cores
  • Fixed issues when number of CPU cores exceed MemTest86 version's max core limit
  • Fixed rounding error with DDR5 clock speed
  • Fixed test selection in console only mode

    • Source: Tweakers.net

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